Pin | Name | Description |
1 | | +5V 3-T regulator voltage supply (about +8V) |
1 | | +5V 3-T regulator voltage supply (about +8V) |
1 | | +5V 3-T regulator voltage supply (about +8V) |
2 | - | |
2 | - | |
2 | - | |
3 | GND | Ground |
3 | GND | Ground |
3 | GND | Ground |
4 | READYA | System ready (10K pull-up to +5V) |
4 | READYA | System ready (10K pull-up to +5V) |
4 | READYA | System ready (10K pull-up to +5V) |
5 | GND | Ground |
5 | GND | Ground |
5 | GND | Ground |
6 | RESET* | System reset (active low) |
6 | RESET* | System reset (active low) |
6 | RESET* | System reset (active low) |
7 | GND | Ground |
7 | GND | Ground |
7 | GND | Ground |
8 | SCLK | System clock (not connected) |
8 | SCLK | System clock (not connected) |
8 | SCLK | System clock (not connected) |
9 | LCP* | CPU indicator 1=TI99 0=2nd generation (not connected) |
9 | LCP* | CPU indicator 1=TI99 0=2nd generation (not connected) |
9 | LCP* | CPU indicator 1=TI99 0=2nd generation (not connected) |
10 | AUDIO | Input audio (=AUDIOIN) |
10 | AUDIO | Input audio (=AUDIOIN) |
10 | AUDIO | Input audio (=AUDIOIN) |
11 | RDBENA* | Active low: enable flex cable data bus drivers (1K pull-up) |
11 | RDBENA* | Active low: enable flex cable data bus drivers (1K pull-up) |
11 | RDBENA* | Active low: enable flex cable data bus drivers (1K pull-up) |
12 | PCBEN | PCB enable for burn-in (always High) |
12 | PCBEN | PCB enable for burn-in (always High) |
12 | PCBEN | PCB enable for burn-in (always High) |
13 | HOLD* | Active low CPU hold request (always High) |
13 | HOLD* | Active low CPU hold request (always High) |
13 | HOLD* | Active low CPU hold request (always High) |
14 | IAQHA | IAQ [or] HOLDA (logical or) |
14 | IAQHA | IAQ [or] HOLDA (logical or) |
14 | IAQHA | IAQ [or] HOLDA (logical or) |
15 | SENILA* | Interrupt level A sense enable (always High) |
15 | SENILA* | Interrupt level A sense enable (always High) |
15 | SENILA* | Interrupt level A sense enable (always High) |
16 | SENILB* | Interrupt level B sense enable (always High) |
16 | SENILB* | Interrupt level B sense enable (always High) |
16 | SENILB* | Interrupt level B sense enable (always High) |
17 | INTA* | Active low interrupt level A (=EXTINT*) |
17 | INTA* | Active low interrupt level A (=EXTINT*) |
17 | INTA* | Active low interrupt level A (=EXTINT*) |
18 | LOAD* | Unmaskable interrupt (not connected) |
18 | LOAD* | Unmaskable interrupt (not connected) |
18 | LOAD* | Unmaskable interrupt (not connected) |
19 | D7 | Data bus, bit 7 (least significant) |
19 | D7 | Data bus, bit 7 (least significant) |
19 | D7 | Data bus, bit 7 (least significant) |
20 | GND | Ground |
20 | GND | Ground |
20 | GND | Ground |
21 | D5 | |
21 | D5 | |
21 | D5 | |
22 | D6 | |
22 | D6 | |
22 | D6 | |
23 | D3 | |
23 | D3 | |
23 | D3 | |
24 | D4 | |
24 | D4 | |
24 | D4 | |
25 | D1 | |
25 | D1 | |
25 | D1 | |
26 | D2 | |
26 | D2 | |
26 | D2 | |
27 | GND | Ground |
27 | GND | Ground |
27 | GND | Ground |
28 | D0 | Data bus, bit 0 (most significant) |
28 | D0 | Data bus, bit 0 (most significant) |
28 | D0 | Data bus, bit 0 (most significant) |
29 | A14 | |
29 | A14 | |
29 | A14 | |
30 | A15 | Address bus, lsb. Also CRU output bit. |
30 | A15 | Address bus, lsb. Also CRU output bit. |
30 | A15 | Address bus, lsb. Also CRU output bit. |
31 | A12 | |
31 | A12 | |
31 | A12 | |
32 | A13 | |
32 | A13 | |
32 | A13 | |
33 | A10 | |
33 | A10 | |
33 | A10 | |
34 | A11 | |
34 | A11 | |
34 | A11 | |
35 | A8 | |
35 | A8 | |
35 | A8 | |
36 | A9 | |
36 | A9 | |
36 | A9 | |
37 | A6 | |
37 | A6 | |
37 | A6 | |
38 | A7 | |
38 | A7 | |
38 | A7 | |
39 | A4 | |
39 | A4 | |
39 | A4 | |
40 | A5 | |
40 | A5 | |
40 | A5 | |
41 | A2 | |
41 | A2 | |
41 | A2 | |
42 | A3 | |
42 | A3 | |
42 | A3 | |
43 | A0 | Address but, bit 0 (most significant) |
43 | A0 | Address but, bit 0 (most significant) |
43 | A0 | Address but, bit 0 (most significant) |
44 | A1 | |
44 | A1 | |
44 | A1 | |
45 | AMB | Extra address bit. Always High. |
45 | AMB | Extra address bit. Always High. |
45 | AMB | Extra address bit. Always High. |
46 | AMA | Extra address bit. Always High. |
46 | AMA | Extra address bit. Always High. |
46 | AMA | Extra address bit. Always High. |
47 | GND | Ground |
47 | GND | Ground |
47 | GND | Ground |
48 | AMC | Extra address bit. Always High. |
48 | AMC | Extra address bit. Always High. |
48 | AMC | Extra address bit. Always High. |
49 | GND | Ground |
49 | GND | Ground |
49 | GND | Ground |
50 | CLKOUT* | Inversion of phase 3 clock (=PHI3*) |
50 | CLKOUT* | Inversion of phase 3 clock (=PHI3*) |
50 | CLKOUT* | Inversion of phase 3 clock (=PHI3*) |
51 | CRUCLK* | Inversion of TMS9900 CRUCLOCK pin |
51 | CRUCLK* | Inversion of TMS9900 CRUCLOCK pin |
51 | CRUCLK* | Inversion of TMS9900 CRUCLOCK pin |
52 | DBIN | Active high = read memory |
52 | DBIN | Active high = read memory |
52 | DBIN | Active high = read memory |
53 | GND | Ground |
53 | GND | Ground |
53 | GND | Ground |
54 | WE* | Write Enable (derived from TMS9900 WE* pin) |
54 | WE* | Write Enable (derived from TMS9900 WE* pin) |
54 | WE* | Write Enable (derived from TMS9900 WE* pin) |
55 | CRUIN | CRU input bit to TMS9900 |
55 | CRUIN | CRU input bit to TMS9900 |
55 | CRUIN | CRU input bit to TMS9900 |
56 | MEMEN* | Memory access enable (active low) |
56 | MEMEN* | Memory access enable (active low) |
56 | MEMEN* | Memory access enable (active low) |
57 | | -12 Volts 3-T regulator supply voltage (about -16V) |
57 | | -12 Volts 3-T regulator supply voltage (about -16V) |
57 | | -12 Volts 3-T regulator supply voltage (about -16V) |
58 | | Dito |
58 | | Dito |
58 | | Dito |
59 | | +12 Volts 3-T regulator supply voltage (about +16V) |
59 | | +12 Volts 3-T regulator supply voltage (about +16V) |
59 | | +12 Volts 3-T regulator supply voltage (about +16V) |
60 | | Dito |
60 | | Dito |
60 | | Dito |