| Pin | Name | Description |
| 1 | Ground | Ground |
| 2 | Reserved | Reserved |
| 3 | Ground | Ground |
| 4 | Reserved | Reserved |
| 5 | Ground | Ground |
| 6 | Reserved | Reserved |
| 7 | Ground | Ground |
| 8 | Reserved | Reserved |
| 9 | Ground | Ground |
| 10 | Reserved | Reserved |
| 11 | UV bit 7 | UV bit 7 |
| 12 | UV bit 6 | UV bit 6 |
| 13 | UV bit 5 | UV bit 5 |
| 14 | UV bit 4 | UV bit 4 |
| 15 | UV bit 3 | UV bit 3 |
| 16 | UV bit 2 | UV bit 2 |
| 17 | UV bit 1 | UV bit 1 |
| 18 | UV bit 0 | UV bit 0 |
| 19 | Y bit 7 | Y bit 7 |
| 20 | Y bit 6 | Y bit 6 |
| 21 | Y bit 5 | Y bit 5 |
| 22 | Y bit 4 | Y bit 4 |
| 23 | Y bit 3 | Y bit 3 |
| 24 | Y bit 2 | Y bit 2 |
| 25 | Y bit 1 | Y bit 1 |
| 26 | Y bit 0 | Y bit 0 |
| 27 | Ground | Ground |
| 28 | Line-locked clock | Line-locked clock |
| 29 | Ground | Ground |
| 30 | Clock reference qualifier | Clock reference qualifier |
| 31 | Ground | Ground |
| 32 | Vertical sync | Vertical sync |
| 33 | Ground | Ground |
| 34 | Reserved | Reserved |
| 35 | Ground | Ground |
| 36 | HRef | HRef |
| 37 | Ground | Ground |
| 38 | DIR * | DIR * |
| 39 | IIC Data * | IIC Data * |
| 40 | IIC Clock | IIC Clock |
| 41 | Ground | Ground |
| 42 | Analog audio input left | Analog audio input left |
| 43 | Analog audio input common | Analog audio input common |
| 44 | Analog audio input right | Analog audio input right |
| 45 | Ground | Ground |
| 46 | Digital audio input | Digital audio input |
| 47 | Ground | Ground |
| 48 | Digital audio output | Digital audio output |
| 49 | Ground | Ground |
| 50 | Digital audio clock | Digital audio clock |
| 51 | Ground | Ground |
| 52 | Digital audio sync | Digital audio sync |
| 53 | Ground | Ground |
| 54 | S video input C component | S video input C component |
| 55 | Video input ground | Video input ground |
| 56 | S video input Y component | S video input Y component |
| 57 | Video input ground | Video input ground |
| 58 | Reserved | Reserved |
| 59 | Reserved | Reserved |
| 60 | Reserved | Reserved |
